This invention relates to time-dividing circuits for dividing the period of an input signal having a periodicity, and particularly to a time-dividing method and circuit suitable for use in extracting only a particular time-divided timing in the automatic white balance control circuit of color television.
When it is desired to divide the period of an input signal in synchronism with the period, a PLL (phase locked loop) using a VCO (voltage controlled oscillator) is generally used. The conventional technique for the PLL circuit of this kind is described in, for example, "Bipolar Integrated Circuit", pp 218-229, published by Kindaikagakusha in Japan (1984).
This PLL circuit can be used to produce an output having the period of the input signal divided by N, but generally it is a large circuit scale. Also, if only a particular time-divided timing is necessary, a counter circuit must be added.
Other conventional technical papers showing the background of the invention are as follows:
"Basics and Applications of PLL" pp 60-97; PA1 HITACHI, AKB IC pp 1-19; and PA1 ECN 2511 Application Guide pp 1-12.
The above prior art is widely used and excellent, but has the problem that the circuit scale is too large to be economical when a particular time-divided timing is necessary.